FreeCAD: master edc7e3ed

Author Committer Branch Timestamp Parent
Syres916 yorik master 2020-02-28 04:48:50 master f043f465
Changeset [Draft] WireToBSpline Fix makeWire Placement

See discussion https://forum.freecadweb.org/viewtopic.php?f=23&t=43184
mod - src/Mod/Draft/Draft.py Diff File