FreeCAD: master f043f465

Author Committer Branch Timestamp Parent
Syres916 yorik master 2020-02-28 04:41:21 master 27eb8beb
Changeset [Draft] WireToBSpline Fix Placement of makeWire

See Discussion https://forum.freecadweb.org/viewtopic.php?f=23&t=43184
mod - src/Mod/Draft/DraftTools.py Diff File