FreeCAD: master a9189fb0

Author Committer Branch Timestamp Parent
wmayer wmayer master 2016-01-05 17:27:56 master 7d0e892d
Changeset + use TRUE and FALSE for Vrml output (reverts part of commit 7d0e892d3)
mod - src/Mod/Mesh/App/Core/MeshIO.cpp Diff File