FreeCAD: master 0b2ac1d9

Author Committer Branch Timestamp Parent
blacey yorik master 2017-03-14 22:50:56 master 981cca94
Changeset ports-cache timeout

  * Use travis_wait for prime_local_ports_cache to increase ports-cache
    time limit imposed when restoring a ports-cache
mod - .travis.yml Diff File